(i) Field of the Invention
The present invention relates to ULSI wiring in which wiring layers are separately formed via a diffusion prevention layer with an insulating interlayer portion made of SiO2, and a method of manufacturing the same.
(ii) Description of the Related Art
In ULSI wiring, attendant upon the requirements of an increase in capacity of ULSI and a decrease in cost of manufacture, it is desired to decrease in size of wiring structure and simplify the manufacturing process. From these points, as fabrication techniques for ULSI wiring structures, at present, dual damascene processes are mainstream (hereinafter referred to as prior art 1).
In ULSI wiring according to the prior art 1, in case that a wiring layer is made of Cu (copper), Cu constituting the wiring layer diffuses into an insulating interlayer so that it may bring about bad insulation. Therefore, it is indispensable to interpose a diffusion prevention layer between the wiring layer and the insulating interlayer and thereby prevent Cu from diffusing into the insulating interlayer.
Conventionally, for this diffusion prevention layer, use is made of TaN, TiN, or the like, formed mainly through a sputtering process. Besides, in case that the wiring layer is formed on this diffusion prevention layer by electroplating, in particular, with copper, since the diffusion prevention layer of TaN, TiN, or the like, as described above, is inferior in electrical conductivity, a Cu seed layer or the like as a conductive layer is required.
Although, in dual damascene processes, simplification of process and a decrease in cost by application of wet processes are considered to be advantageous, it is hard to say that the use of dry processes, such as sputtering upon fabrication of the diffusion prevention layer and the conductive layer, is the best technique.
So, a technique is first thinkable in which the diffusion prevention layer is fabricated through an electroless plating process as a wet process. A method of forming such a diffusion prevention layer by electroless plating is reported in, e.g., Electrochimica Acta, vol. 44 (1999), pp. 3639-3649 (hereinafter referred to as prior art 2). For forming a diffusion prevention layer by electroless plating, it is indispensable to give catalysis to the surface of an insulating interlayer. However in the above report, for forming a diffusion prevention layer of COWP, a Co layer is formed as a catalyst layer by sputtering to give catalysis. In this way, in the case of forming the catalyst layer by sputtering, a thickness to some extent is required for keeping adhesive properties between the diffusion prevention layer and the insulating interlayer, and the uniformity of the diffusion prevention layer. Therefore, by this method, further fineness of the ULSI wiring structure is difficult.
Besides, in the above-described process, many steps are required till the fabrication of the wiring layer. In addition, two processes different in phase, such as sputtering and CVD as dry processes, and electroplating as a wet process, must be performed. Therefore, the process is complicated and it is disadvantageous in cost.
Further, a layer of SiN or the like higher in dielectric constant than SiO2, as a capping layer (cap insulating layer), is formed on the wiring layer by chemical vapor deposition (CVD) or the like. In this case, a thickness to some extent is required for keeping the adhesive properties with the wiring layer, and the uniformity and thermal stability of the capping layer. Therefore, the wiring capacity is increased, and further fineness of the wiring structure is difficult.